1. Field of Invention
The present invention generally relates to semiconductor devices, and more particularly to a semiconductor device having a thyrister and SCR (silicon controlled rectifier) for electrostatic protection, which are formed on a SOI (silicon on insulator) substrate.
2. Description of Related Art
Internal circuits of a semiconductor device may be destroyed if a high voltage due to static electricity is applied to input terminals or output terminals. This type of destruction due to static electricity becomes problematic, particularly in CMOS type semiconductor devices. To prevent destructions by static electricity, a method in which a protection circuit using a thyrister or SCR is connected to an output terminal and/or input terminal can be used.
For example, Japanese published patent (Tokko) HEI 2-52426 describes a protection circuit in a CMOS type semiconductor device, such as the one shown in FIG. 4. The protection circuit is equipped with a first contact region 45 of a first conductive type that is formed in a semiconductor substrate 43 of the first conductive type and is connected to a reference power supply voltage VSS, a first semiconductor region 46 of a second conductive type that is formed in the substrate and is connected to the reference power supply voltage, a second contact region 48 of the second conductive type that is formed in a well region 44 and is connected to a specified signal input terminal or a specified signal output terminal, and a second semiconductor region 47 of the first conductive type that is formed in the well region and is connected to the signal input terminal or the signal output terminal.
In FIG. 4, the semiconductor substrate 43 includes a P+ type epitaxial layer 41 and a P type epitaxial layer 42. Also, the input terminal IN is connected to a P channel MOS transistor QP1 and an N channel MOS transistor QN1.
When a positive high voltage is applied to the input terminal IN, a current flows from the P+ type contact region 47 that is connected to the input terminal IN to the N+ type semiconductor region 46 through the N well 44 and the P type epitaxial layer 42.
On the other hand, when a negative voltage is applied to the input terminal IN, a current flows along a normal direction of discharge path from the P+ type epitaxial layer 41 that is connected to the reference power supply voltage VSS or the P+ type contact region 45, through the P type epitaxial layer 42 and the N well 44, to the input terminal IN that is connected to the N+ type contact region 48. In this manner, a related art protection circuit using a thyrister needs a few components in a longitudinal direction including a well.
A SOI substrate, in which a single crystal silicon layer is grown on a dielectric substrate, is used to attain good electrical isolation among a plurality of MOS transistors. By using such a SOI substrate, parasitic capacitance of the MOS transistors can be reduced, and good high frequency characteristics can be obtained.
However, in a semiconductor device using a SOI substrate, since components cannot be disposed in a longitudinal direction, it is difficult to form a thyrister or a SCR that shows a good discharge efficiency when static electricity is applied.